제품설명

Features:

Altera Cyclone IV: EP4CE6E22C8N

Number of Logic Elements: 6272

Number of Logic Array Blocks - LABs: 392

Number of I/Os: 91 I/O

Maximum Operating Frequency: 200 MHz

Total Memory: 270 Kbit

System Features:

16MB Quad-SPI Flash

USB-JTAG Programming circuitry (USB Micro cable required, NOT INCLUDED).

Powered from USB or any 7V-15V source

On board Clock: 50MHz, 27Mhz, and SMA connector for external clock

System Connectivity:

USB-UART Bridge SPI (By Expansion Port)

Expansion Connectors:

6 Pmod connectors (Each with 8 Pins)

Compatible with Arduino and raspberry Pi board

Interaction and Sensory Devices

4 Tact Switches

4 Slide Switches

One 4x1 DIP Switch array

16 Red LEDS, 16 Green LEDs

One Reset Button

Time display Seven Segment

LCD display with 16x2 characters

Buzzer

DC motor and driver

Opto-coupler for Motor speed

Product Includes:

1) BlackBoard

2) 5V DC adaptor

3) Altera Byte Blaster

4) Software CD:

a.FPGA programmable file

b.Drivers

c.Manual

d.Getting started: Tutorial

Block Diagram of Black Board

Tutorial Set for Beginners to Advance Designers

Overview of FPGA  Turinig ON LEDs  Switing LED On-Off	Implementing Combinational Circuits  Implementing Sequential Circuits  Making mixed System	Implementing UART for PC communication  Making SPI interface for other devices.  Communicating to Blackboards	Hardware-software codesign  Implementing Processor in FPGA  Making custom hardware for Processors

Related Education Program:

DD 510	DD 520	DD 530	DD 540
Digital Design Techniques & Methodology	Digital Design Techniques & Methodology	Digital Design Techniques & Methodology	Digital Design Techniques & Methodology
VHDL for FPGA Design (I)	VHDL for FPGA Design (II)	VHDL for FPGA Design(III)	VHDL for FPGA Design(IV)
Beginners	Introductory level	Intermediate level	Advanced Level
 Combinational and Sequential Logic Design for PLDs and ASICs,  Design and implement fundamental structures  Design and implement synchronous FSM  Designing with FPGA	 VHDL concepts and constructs essential for FPGA design  Write VHDL for RTL synthesis  Targeting code to an FPGA device  Test benches  Tool flow from VHDL through simulation, synthesis and PnR	 Overview of ASIC and FPGA including a survey of state of the art devices  Effective Design methodologies and flows  Advance concepts of hardware simulation and synthesis  Introduction to Hardware-Software Co-design	 VHDL coding for complex FPGA and ASIC design  Sophisticated Test benches  Coding hierarchical designs using multiple VHDL design libraries  Writing re-usable, parameterisable VHDL