Curriculum
Vitae
1. General
Information |
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Name |
Harsh |
Durga |
Tiwari |
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First |
Middle |
Last |
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Date
of Birth |
29/11/1985 (29th November 1985) |
Citizenship |
Indian |
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Professional Status |
Director
of R & D Hyemin Corp. |
연구소 소장 기업 부설 연구소 (차장) |
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Mailing
Address |
Hyemin
Corp. ,SK TechnoPark N-1005, Sungsandong 77-1 |
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Phone |
82-55-600-6166 |
Mobile
|
010-6374-1820 |
E-mail |
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Language
Proficiency |
English
|
Advanced
level Reading, Writing, Listening and Speaking Skills |
Korean |
Basic
Understanding level Reading, Writing, Listening and Speaking Skills |
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Hindi |
Mother
tongue |
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2.
Academic Background |
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Degree |
Period |
Country |
University |
Major |
GPA |
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Doctor of Philosophy |
Sept
2016 – Expected Graduation in 2018 |
S.
Korea |
Changwon
National University |
Electronics |
4.5
out of 4.5 |
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■
Started
Doctorate course in Konkuk University, later shifter to Changwon National
University in 2016. ■
Working
on implementation of Elliptic Curve Cryptosystem for mobile environment. ■
Recipient
of Scholarship from Korean Government Scholarship Program (NIED), an
organization of South Korean Government, for Doctoral Course studies. |
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Master of Technology |
September,
2008 –
August, 2010 |
S.
Korea |
Konkuk
University |
Electronics |
4.5
of 4.5 |
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■
Master of Technology
in Embedded Electronic Systems ■
Gained
Full credits in all the Subjects ■
Recipient of
Scholarship from Institute of Information Technology Advancement (IITA), an
organization of South Korean Government, for Master's Course studies. |
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Bachelor of
Engineering |
July,
2005 – June,
2008 |
India |
Nagpur
University |
Electronics |
74.26
out of 100 |
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■
Bachelor of
Engineering in Electronics Engineering ■
Distinction in 'C'
and Data Structure, Digital Circuits, Signals and Systems, Power Electronics,
Control System Engineering and Electronic System Design. |
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Diploma |
July,
2002 – June, 2005 |
India |
Government
Polytechnic (Autonomous Institute), Nagpur, Maharashtra |
Electronics
and Telecommunication |
86.4
out of 100 |
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■
Diploma in Electronics
and Telecommunication Engineering ■
Distinction in all
Subjects. ■
Department and
College topper. ■
Recipient of Best
Student Award. |
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3.
Skills |
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■
Programming Languages
(Expert): VHDL /
Verilog HDL, C, MATLAB programming language ■
Simulators (Expert): NCLaunch, ModelSim VHDL/Verilog simulators ■
Synthesis tools
(Expert): Synopsys
Design Compiler, Design Analyzer, Design Vision, Quartus, Xilinx
Implementation Tools, Synplicity, ■
Foundry Tools
(Intermediate):
Synopsys ASTRO, IC-COMPILER, Samsung's Foundry tools Cubicware, Primetime |
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4.
Publications |
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1. Harsh
Durga Tiwari, Honey Durga Tiwari, Yong Beom Cho, "Reduced complexity
high throughput LDPC encoder", SoC Conference, Incheon, May, 2010 2. Harsh
Durga Tiwari, Honey Durga Tiwari, Yong Beom Cho, "Integer scaled two
dimensional DCT based OFDM", SoC Conference, Incheon, May, 2010 3. Harsh Durga Tiwari, "Challenges
in Manufacturing of 45nm Technology & ULSI Designing", IEEE
Technovision-07 National Level Technical Symposium, 2007. |
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5.
Industrial Experience |
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Company |
Period |
Job Title |
Responsibilities |
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Hyemin Corp. Ltd Changwon, S. Korea |
Dec 2014 ~ Jun 2015 |
Research Engineer (Part time) |
Development of algorithm and
Hardware FPGA codes for ultrasound system |
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Jul 2015 ~ Dec 2015 |
Senior Research Engineer |
Implementation and development of FPGA based system for ultrasound
system |
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Jan 2016 ~ Till date |
Director of Research and Development |
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Complete implementation of medical ultrasound scanner ■
ADC – FPGA system development for data accusation system ■
FPGA system development for hardware- software algorithm implementation |
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6. Research
Experience |
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Doctorate Period |
VLSI Lab, Konkuk University |
ASIC/FPGA Design/Verification |
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Implementation of Elliptical curve cryptosystem for
mobile environment. ■
Parallel
processing implementation methods, especially for the mobile platform for
Multiview Video Coding. ■
Efficient
implantation for different algorithm on ARM CortexA9 and newer architectures. ■
Design
of wireless power transmitter/ receiver communication and control circuit. ■
MMSE/LSE
equalizer design for 2-D DCT based OFDM. ■
Hardware software
co-design for 3D coding. |
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Master's Period |
VLSI Lab, Konkuk University |
ASIC/FPGA Design/Verification |
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Design
of hardware accelerator for fast trigonometric computation using ancient
Indian Mathematics. ■
Developed
two-dimensional discrete cosine transform (DCT) based orthogonal
frequency-division multiplexing (OFDM). ■
Designed
MATLAB-SIMULINK model for 2-D DCT based OFDM. ■
Power
Measurement of software codes using Labview (Signal Express) ■
Implementation
of MPW chip consisting of GPS Correlator, LDPC encoder, 8051 micro-controller
core on 0.18µm and 0.9µM technology. ■
Stereoscopic
passenger counter ■
Design
of MSE equalizer for two dimensional discrete cosine transform based
orthogonal frequency division multiplexing ■
Fast multiplier based
on Vedic Mathematics |
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Under-graduation |
Electronics Dept. Nagpur University |
Developer |
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Application
of Low Density Parity Check Codes To Digital Communication Systems-Final Year
Project of Engineering. ■
Virtual
reality-Simulating leg movement of Human being in two directions: Mini
project for the subject: Digital system design (VHDL based). ■
PLC
Based automation system for rail gate opener & elevator: Mini project for
the subject Adv. microprocessor & controllers. ■
Virtual
reality-Simulating leg movement of Human being in two direction: Pre-final
project (microcontroller 8051 based). |
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Diploma |
Electronics Dept. GP Nagpur |
Developer |
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Electronic
voting Machine: Final year project of Polytechnic. ■
Invisible
Intruder Alarm: mini-project for polytechnic. |
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7.
Experience summary |
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■
Designed
and verified various SoC design using iProve and various embedded development
board. ■
Front-end
and back end design flow for LDPC encoder digital IC design. ■
Worked on
stereo-vision based passenger counter system. |
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■
Went
to South Africa for teaching one week Embedded Course organized by South
Korean and South African Government (2010). ■
Worked
as International Student Advisor for the Summer Embedded Training Program
hold for the South African students from June to August organized by South
Korean government and South African government (2011). ■
Worked
for front-end and back-end work flow in three VLSI chip designs. Work
included complete chip implementation and IC testing (2012). ■
Worked
as hardware designer and chip designer in various industrial (Passenger
Counter and SoC digital design verification) and academic (Two-dimensional
DCT based OFDM and LDPC encoder design) projects (2013). ■
Have
always been amongst top three students of class in every level of education. ■
Holding the post of
representative of India in the Ambassador office of Konkuk University form
2010 December till 2013. |
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8.
Awards and Honors |
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■
Awarded
full scholarship and stipend for Masters and Doctors course for excellent
performance. ■
Best
paper award for "Reduced Complexity high throughput LDPC encoder"
presented in SoC conference, Seoul, South Korea, 2010. ■
Recipient
of two Gold medals and Best Student Award for scoring highest marks in
Diploma of Electronics and Telecommunication engineering. |
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9.
Certifications |
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Arm
Compiler and Debugger (IDEC), 2008 ■
MPW
Backend Design (ITSoC), 2009 ■
MPW
Design Tool – Astro (ITSoC), 2009 ■
High
Speed Digital Communication and Network System (IEEK), 2010 ■
Automotive sensor
technology workshop, 2010 |
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10.
Memberships |
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Institute of
Electronics Engineers of Korea |
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